ADC14SHT0=ADC14SHT0_0, ADC14MSC=ADC14MSC_0, ADC14ON=ADC14ON_0, ADC14ENC=ADC14ENC_0, ADC14SC=ADC14SC_0, ADC14ISSH=ADC14ISSH_0, ADC14BUSY=ADC14BUSY_0, ADC14SHT1=ADC14SHT1_0, ADC14PDIV=ADC14PDIV_0, ADC14SHS=ADC14SHS_0, ADC14CONSEQ=ADC14CONSEQ_0, ADC14SHP=ADC14SHP_0, ADC14SSEL=ADC14SSEL_0, ADC14DIV=ADC14DIV_0
Control 0 Register
| ADC14SC | ADC14 start conversion 0 (ADC14SC_0): No sample-and-conversion-start 1 (ADC14SC_1): Start sample-and-conversion |
| ADC14ENC | ADC14 enable conversion 0 (ADC14ENC_0): ADC14 disabled 1 (ADC14ENC_1): ADC14 enabled |
| ADC14ON | ADC14 on 0 (ADC14ON_0): ADC14 off 1 (ADC14ON_1): ADC14 on. ADC core is ready to power up when a valid conversion is triggered. |
| ADC14MSC | ADC14 multiple sample and conversion 0 (ADC14MSC_0): The sampling timer requires a rising edge of the SHI signal to trigger each sample-and-convert 1 (ADC14MSC_1): The first rising edge of the SHI signal triggers the sampling timer, but further sample-and-conversions are performed automatically as soon as the prior conversion is completed |
| ADC14SHT0 | ADC14 sample-and-hold time 0 (ADC14SHT0_0): 4 1 (ADC14SHT0_1): 8 2 (ADC14SHT0_2): 16 3 (ADC14SHT0_3): 32 4 (ADC14SHT0_4): 64 5 (ADC14SHT0_5): 96 6 (ADC14SHT0_6): 128 7 (ADC14SHT0_7): 192 |
| ADC14SHT1 | ADC14 sample-and-hold time 0 (ADC14SHT1_0): 4 1 (ADC14SHT1_1): 8 2 (ADC14SHT1_2): 16 3 (ADC14SHT1_3): 32 4 (ADC14SHT1_4): 64 5 (ADC14SHT1_5): 96 6 (ADC14SHT1_6): 128 7 (ADC14SHT1_7): 192 |
| ADC14BUSY | ADC14 busy 0 (ADC14BUSY_0): No operation is active 1 (ADC14BUSY_1): A sequence, sample, or conversion is active |
| ADC14CONSEQ | ADC14 conversion sequence mode select 0 (ADC14CONSEQ_0): Single-channel, single-conversion 1 (ADC14CONSEQ_1): Sequence-of-channels 2 (ADC14CONSEQ_2): Repeat-single-channel 3 (ADC14CONSEQ_3): Repeat-sequence-of-channels |
| ADC14SSEL | ADC14 clock source select 0 (ADC14SSEL_0): MODCLK 1 (ADC14SSEL_1): SYSCLK 2 (ADC14SSEL_2): ACLK 3 (ADC14SSEL_3): MCLK 4 (ADC14SSEL_4): SMCLK 5 (ADC14SSEL_5): HSMCLK |
| ADC14DIV | ADC14 clock divider 0 (ADC14DIV_0): /1 1 (ADC14DIV_1): /2 2 (ADC14DIV_2): /3 3 (ADC14DIV_3): /4 4 (ADC14DIV_4): /5 5 (ADC14DIV_5): /6 6 (ADC14DIV_6): /7 7 (ADC14DIV_7): /8 |
| ADC14ISSH | ADC14 invert signal sample-and-hold 0 (ADC14ISSH_0): The sample-input signal is not inverted 1 (ADC14ISSH_1): The sample-input signal is inverted |
| ADC14SHP | ADC14 sample-and-hold pulse-mode select 0 (ADC14SHP_0): SAMPCON signal is sourced from the sample-input signal 1 (ADC14SHP_1): SAMPCON signal is sourced from the sampling timer |
| ADC14SHS | ADC14 sample-and-hold source select 0 (ADC14SHS_0): ADC14SC bit 1 (ADC14SHS_1): See device-specific data sheet for source 2 (ADC14SHS_2): See device-specific data sheet for source 3 (ADC14SHS_3): See device-specific data sheet for source 4 (ADC14SHS_4): See device-specific data sheet for source 5 (ADC14SHS_5): See device-specific data sheet for source 6 (ADC14SHS_6): See device-specific data sheet for source 7 (ADC14SHS_7): See device-specific data sheet for source |
| ADC14PDIV | ADC14 predivider 0 (ADC14PDIV_0): Predivide by 1 1 (ADC14PDIV_1): Predivide by 4 2 (ADC14PDIV_2): Predivide by 32 3 (ADC14PDIV_3): Predivide by 64 |